Re-Examination of Hot Carrier Degradation Mechanism in Ultra-Scaled nFinFETs
Author:
Affiliation:
1. College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China
2. School of Integrated Circuits, East China Normal University, Shanghai, China
Funder
National Key Research and Development Program of China
Key Research and Development Program of Zhejiang Province
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/55/9927475/09880473.pdf?arnumber=9880473
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Electrical Stress on the CMOS Inverters Made by Junctionless Gate-All-Around Transistors;IEEE Transactions on Electron Devices;2024-05
2. Impact of Hot Carrier Degradation and Bias Temperature Instability on GHz Cycle-to-Cycle Variation in Ultra-Scaled FinFETs;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14
3. A Review of Reliability in Gate-All-Around Nanosheet Devices;Micromachines;2024-02-13
4. Analysis of Traps Behavior Related to Body-Biased Hot Carrier Degradation in 14 nm nFinFETs;IEEE Transactions on Electron Devices;2023-12
5. Insight into over Repair of Hot Carrier Degradation by GIDL Current in Si p-FinFETs Using Ultra-Fast Measurement Technique;Nanomaterials;2023-04-03
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