Complexity Reduced LUT-Based DAC Correction in Continuous-Time Delta-Sigma Modulators
Author:
Affiliation:
1. University of Ulm,Albert-Einstein-Allee 43,Institute of Microelectronics,Ulm,Germany
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937300.pdf?arnumber=9937300
Reference17 articles.
1. A 50MHZ-BW continuous-time ΔΣ ADC with dynamic error correction achieving 79.8dB SNDR and 95.2dB SFDR
2. Digital Correction of DAC Nonlinearity in Multi-Bit Feedback A/D Converters: Invited tutorial
3. An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators
4. A 160MHz-BW 72dB-DR 40mW continuous-time ΔΣ modulator in 16nm CMOS with analog ISI-reduction technique
5. A Self Calibration Method for Fast, High Resolution A/D and D/A Converters
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