Intel Alder Lake CPU Architectures-Reference-Cited by-同舟云学术

Intel Alder Lake CPU Architectures

Published:2022-05-01 Issue:3 Volume:42 Page:13-19
ISSN:0272-1732
Container-title:IEEE Micro
language:
Short-container-title:IEEE Micro

Author:

Rotem Efraim¹^ORCID,Yoaz Adi¹,Rappoport Lihu¹,Robinson Stephen J.¹,Mandelblat Julius Yuli¹,Gihon Arik¹,Weissmann Eliezer¹,Chabukswar Rajshree¹,Basin Vadim¹,Fenger Russell¹,Gupta Monica¹,Yasin Ahmad¹^ORCID

Affiliation:

1. Intel Corporation, Mountain View, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/40/9779387/09747991.pdf?arnumber=9747991

Reference7 articles.

1. Lakefield: Hybrid cores in 3D Package

2. H-EARtH: Heterogeneous Multicore Platform Energy Management

3. Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge

4. A Top-Down method for performance analysis and counters architecture

Cited by 25 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Decoupled Vector Runahead for Prefetching Nested Memory-Access Chains;IEEE Micro;2024-07

2. Alternate Path μ-op Cache Prefetching;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

3. Heterogeneous Hyperthreading;2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2024-05-27

4. FOCAL: A First-Order Carbon Model to Assess Processor Sustainability;Proceedings of the 29th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2024-04-27

5. Dynamic Detection and Mitigation of Read-disturb for Accurate Memristor-based Neural Networks;2024 IEEE 6th International Conference on AI Circuits and Systems (AICAS);2024-04-22