AIDA: Associative In-Memory Deep Learning Accelerator

Author:

Garzon Esteban1ORCID,Teman Adam2ORCID,Lanuzza Marco1ORCID,Yavits Leonid2ORCID

Affiliation:

1. University of Calabria, Rende, Italy

2. Bar-Ilan University, Ramat-Gan, Israel

Funder

Israel Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. MERRC: A Memristor-Enabled Reconfigurable Low-Power Reservoir Computing Architecture at the Edge;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-01

2. Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations;IEEE Journal on Exploratory Solid-State Computational Devices and Circuits;2024

3. Voltage-Divider-Based Binary and Ternary Content-Addressable Memory (CAM) Exploiting Double-Barrier Magnetic Tunnel Junction;2023 IEEE Seventh Ecuador Technical Chapters Meeting (ECTM);2023-10-10

4. Will computing in memory become a new dawn of associative processors?;Memories - Materials, Devices, Circuits and Systems;2023-07

5. Approximate Content-Addressable Memories: A Review;Chips;2023-03-30

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