Design-oriented modeling of 28 nm FDSOI CMOS technology down to 4.2 K for quantum computing-Reference-Cited by-同舟云学术

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Design-oriented modeling of 28 nm FDSOI CMOS technology down to 4.2 K for quantum computing

Published:2018-03 Issue: Volume: Page:
ISSN:
Container-title:2018 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS)
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Author:

Beckers Arnout,Jazaeri Farzan,Bohuslavskyi Heorhii,Hutin Louis,De Franceschi Silvano,Enz Christian

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8347190/8354336/08354742.pdf?arnumber=8354742

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Cryogenic Voltage Regulator with Integrated Voltage Reference in 22 nm FDSOI Technology;2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS);2023-11-19

2. The SiGe HBT at Cryogenic Temperatures: Invited Pager;2023 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS);2023-10-16

3. Improved performance of FDSOI FETs at cryogenic temperatures by optimizing ion implantation into silicide;Solid-State Electronics;2023-10

4. Characterization of Noise in CMOS Ring Oscillators at Cryogenic Temperatures;IEEE Electron Device Letters;2023-09

5. Effective Channel Mobility Extraction and Modeling of 10-nm Bulk CMOS FinFETs in Cryogenic Temperature Operation for Quantum Computing Applications;IEEE Transactions on Electron Devices;2023-04

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