BIST-based delay-fault testing in FPGAs
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/8008/22136/01030195.pdf?arnumber=1030195
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1. Research on Bitstream Configuration Technology of Programmable SoC Mass Production Test Based on Reconfiguration Mechanism;2022 IEEE 10th Joint International Information Technology and Artificial Intelligence Conference (ITAIC);2022-06-17
2. Automatic Application-Specific Calibration to Enable Dynamic Voltage Scaling in FPGAs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2018-12
3. Measure twice and cut once: Robust dynamic voltage scaling for FPGAs;2016 26th International Conference on Field Programmable Logic and Applications (FPL);2016-08
4. Application-Independent Testing of 3-D Field Programmable Gate Array Interconnect Faults;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2014-02
5. Field Slack Assessment for Predictive Fault Avoidance on Coarse-Grained Reconfigurable Devices;IEICE Transactions on Information and Systems;2013
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