Design of SRAM Based Interface Module with DMA in Inductive-Coupling 3D Stacked IoT Chips
Author:
Affiliation:
1. Zhejiang University,Polytechnic Institute,Hangzhou,China
2. Hubei University of Technology,School of Science,Wuhan,China
3. Zhejiang University,College of ISEE,Hangzhou,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9943567/9943566/09943791.pdf?arnumber=9943791
Reference15 articles.
1. 47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking
2. More than moore and beyond CMOS: New interconnects schemes and new circuits architectures
3. 3-D System Integration of Processor and Multi-Stacked SRAMs Using Inductive-Coupling Link
4. A 3D-Stacked SRAM using Inductive Coupling with Low-Voltage Transmitter and 12:1 SerDes
5. An inductive-coupling link for 3D integration of a 90nm CMOS processor and a 65nm CMOS SRAM
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