New understanding of LDD CMOS hot-carrier degradation and device lifetime at cryogenic temperatures
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx3/4455/12628/00584280.pdf?arnumber=584280
Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Study on the relation between interface trap creation and MOSFET degradation under channel hot carrier stressing at cryogenic temperatures;Japanese Journal of Applied Physics;2024-03-22
2. Influence of Back Gate Bias on the Hot Carrier Reliability of DSOI nMOSFET;2023 IEEE International Reliability Physics Symposium (IRPS);2023-03
3. Time-to-Failure Models for Selected Failure Mechanisms in Integrated Circuits;Reliability Physics and Engineering;2018-12-21
4. Analysis of the efficiency of external cooling of slow-speed long-stroke oil-free reciprocating compressor stages with asymmetric design scheme;AIP Conference Proceedings;2018
5. Cryogenic Lifetime Studies of 130 nm and 65 nm nMOS Transistors for High-Energy Physics Experiments;IEEE Transactions on Nuclear Science;2015-06
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