New Continuous-Time Multibit Sigma–Delta Modulators With Low Sensitivity to Clock Jitter

Author:

Colodro F.,Torralba A.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Correction of errors and harmonic distortion in pulse-width modulation of digital signals;AEU - International Journal of Electronics and Communications;2021-12

2. A 30.3 fA/Hz Biosensing Current Front-End with 139 dB Cross-Scale Dynamic Range;IEEE Transactions on Biomedical Circuits and Systems;2021

3. An Extremely Linear Multi-Level DAC for Continuous-Time Delta-Sigma Modulators;IEEE Transactions on Circuits and Systems II: Express Briefs;2019-03

4. Review and Comparison of Clock Jitter Noise Reduction Techniques for Lowpass Continuous-Time Delta-Sigma Modulators;Journal of Low Power Electronics and Applications;2017-09-06

5. Practical analysis of clock jitter reduction techniques under power supply noise for continuous-time delta-sigma modulators;Analog Integrated Circuits and Signal Processing;2016-09-01

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