ACPC: Covert Channel Attack on Last Level Cache using Dynamic Cache Partitioning
Author:
Affiliation:
1. Indian Institute of Technology,Department of Computer Science and Engineering,Ropar,India
2. Indian Institute of Technology,Department of Computer Science and Engineering,Hyderabad,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10129281/10129282/10129363.pdf?arnumber=10129363
Reference15 articles.
1. Systematic Reverse Engineering of Cache Slice Selection in Intel Processors
2. DAAIP: Deadblock Aware Adaptive Insertion Policy for High Performance Caching;newton;ICCD,2017
3. The gem5 simulator
4. SPEC CPU2006 Benchmark Descriptions;l;ACM SIGARCH Computer Architecture News,2006
5. CIACP: A Correlation- and Iteration- Aware Cache Partitioning Mechanism to Improve Performance of Multiple Coarse-Grained Reconfigurable Arrays
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