Whitespace-Aware TSV Arrangement in 3-D Clock Tree Synthesis
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Published:2015-09
Issue:9
Volume:23
Page:1842-1853
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ISSN:1063-8210
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Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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language:
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Short-container-title:IEEE Trans. VLSI Syst.
Author:
Liu Wulong,Wang Yu,Chen Guoqing,Ma Yuchun,Xie Yuan,Yang Huazhong
Funder
973 Project
National Science and Technology Major Project
National Natural Science Foundation of China
Tsinghua University Initiative Scientific Research Program
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
3 articles.
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