Timing Analysis of Tasks on Runtime Reconfigurable Processors-Reference-Cited by-同舟云学术

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Timing Analysis of Tasks on Runtime Reconfigurable Processors

Published:2017-01 Issue:1 Volume:25 Page:294-307
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Damschen Marvin^ORCID,Bauer Lars,Henkel Jorg

Funder

German Research Foundation (DFG)

Transregional Collaborative Research Centre “Invasive Computing”

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/7797597/07490406.pdf?arnumber=7490406

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Analysis of Reconfiguration Delay in Heterogeneous Systems-on-Chip via Traffic Injection;IEEE Embedded Systems Letters;2023

2. WCET Guarantees for Opportunistic Runtime Reconfiguration;2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD);2019-11

3. i-Core: A Runtime-Reconfigurable Processor Platform for Cyber-Physical Systems;Embedded, Cyber-Physical, and IoT Systems;2019-06-29

4. Optimization of Fault-Tolerant Mixed-Criticality Multi-Core Systems with Enhanced WCRT Analysis;ACM Transactions on Design Automation of Electronic Systems;2019-01-11

5. Analyses and architectures for mixed-critical systems;Proceedings of the International Conference on Embedded Software Companion - EMSOFT '19;2019

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