A Low-Power FPGA Based on Autonomous Fine-Grain Power Gating-Reference-Cited by-同舟云学术

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A Low-Power FPGA Based on Autonomous Fine-Grain Power Gating

Published:2011-08 Issue:8 Volume:19 Page:1394-1406
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Ishihara Shota,Hariyama Masanori,Kameyama Michitaka

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx5/92/5961215/05483137.pdf?arnumber=5483137

Cited by 32 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Machine learning algorithms for FPGA Implementation in biomedical engineering applications: A review;Heliyon;2024-02

2. A Survey of FPGA Optimization Methods for Data Center Energy Efficiency;IEEE Transactions on Sustainable Computing;2023-07-01

3. Improving Energy Efficiency of CGRAs with Low-Overhead Fine-Grained Power Domains;ACM Transactions on Reconfigurable Technology and Systems;2023-04-02

4. Dynamic power-gating for leakage power reduction in FPGAs;Frontiers of Information Technology & Electronic Engineering;2023-04

5. Design and Lifetime Estimation of Low-Power 6-Input Look-Up Table Used in Modern FPGA;Journal of Circuits, Systems and Computers;2022-11-24

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