Analysis and Comparison of Low-Power 6-GHz N-Path-Filter-Based Harmonic Selection RF Receiver Front-End Architectures
Author:
Affiliation:
1. Department of Electrical Engineering, École de Technologie Supérieure (ETS), Montreal, QC, Canada
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/9726527/09701668.pdf?arnumber=9701668
Reference39 articles.
1. High-Linearity Bottom-Plate Mixing Technique With Switch Sharing for $N$ -path Filters/Mixers
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3. A 0.1–1 GHz low power RF receiver front-end with noise cancellation technique for WSN applications
4. A 3–5 GHz Current-Reuse $g_{m}$-Boosted CG LNA for Ultrawideband in 130 nm CMOS
5. A Low Power Single Ended Inductorless Wideband CMOS LNA With Gm Enhancement and Noise Cancellation
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1. A Low Power Ultra-Wideband RF Receiver Front-End using a Differential N-Path Notch Filter;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26
2. Blocker-Tolerant Inductor-Less Harmonic Selection Wideband Receiver Front-End for 5G Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-03
3. Wideband Cascaded and Stacked Receiver Front-Ends Employing an Improved Clock-Strategy Technique;Journal of Low Power Electronics and Applications;2023-02-02
4. A Wideband Low-Power Current-Reuse RF-to-BB Receiver Using a Clock Strategy Technique;2022 20th IEEE Interregional NEWCAS Conference (NEWCAS);2022-06-19
5. A Wideband Low-Power RF-to-BB Current-Reuse Receiver Using an Active Inductor and 1 /f Noise-Cancellation for L-Band Applications;IEEE Access;2022
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