Author:
Zhao Wenfeng,Ha Yajun,Alioto Massimo
Funder
chip fabrication sponsorship by MediaTek Singapore
Singapore Ministry of Education, Academic Research Fund, Sub-Cycle Error Correction for Resilient Ultralow Voltage VLSI Processing
Semiconductor Research Corporation/UAEU/ACE4S, Performing Simulations in an Advanced Complementary Metal-Oxide-Semiconductor Technology
Project entitled Unconventional Sizing for Enabling Low Power Digital Design from Memory to Combinatorial Logic
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
28 articles.
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