BTI and Soft-Error Tolerant Voltage Bootstrapped Schmitt Trigger Circuit

Author:

Gupta NehaORCID,Shah Ambika PrasadORCID,Vishvakarma Santosh KumarORCID

Funder

Special Manpower Development Program for Chips to System Design (SMDP-C2SD) research project of DeitY, Government of India

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Safety, Risk, Reliability and Quality,Electronic, Optical and Magnetic Materials

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. NBTI Resilient Dual Mode Noise Immune Inverting Schmitt Trigger Circuit;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03

2. Noninverting Schmitt trigger circuit with electronically tunable hysteresis;Microelectronics Journal;2024-02

3. Domino Logic based Noise Immune Schmitt Trigger Circuit;2023 IEEE International Symposium on Smart Electronic Systems (iSES);2023-12-18

4. CMOS Schmitt Trigger Circuit and Oscillator Design: The Impact of NBTI Degradation;2023 7th International Conference on Computing Methodologies and Communication (ICCMC);2023-02-23

5. Ultra-Efficient and Robust Auto-Nonvolatile Schmitt Trigger-Based Latch Design Using Ferroelectric CNTFET Technology;IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control;2022-05

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