A Low-Delay Quadruple-Node-Upset Self-Recoverable Latch Design
Author:
Affiliation:
1. School of Computer and Communication Engineering, Changsha University of Science and Technology,Changsha,China
Funder
National Natural Science Foundation of China (NSFC)
Hunan Provincial Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10317938/10317940/10317975.pdf?arnumber=10317975
Reference21 articles.
1. Soft error interception latch: double node charge sharing SEU tolerant design
2. TPDICE and Sim Based 4-Node-Upset Completely Hardened Latch Design for Highly Robust Computing in Harsh Radiation
3. Radiation Hardened Latch Designs for Double and Triple Node Upsets
4. Design of a Triple-Node-Upset Self-Recoverable Latch for Aerospace Applications in Harsh Radiation Environments
5. Low energy single event upset/single event transient-tolerant latch for deep subMicron technologies
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1. CQCTL: A Cost-Optimized and Quadruple-Node-Upset Completely Tolerant Latch Design for Safety-Critical Applications;2024 IEEE International Test Conference in Asia (ITC-Asia);2024-08-18
2. A low power TNU-resilient hardened latch design;Microelectronics Reliability;2024-06
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