10MHz to 7GHz quadrature signal generation using a divide-by-4/3, -3/2, -5/3, -2, -5/2, -3, -4, and -5 injection-locked frequency divider
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5552635/5560242/05560270.pdf?arnumber=5560270
Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Overcoming the relative bandwidth limitations of single VCO frequency synthesizers by implementing a novel PLL architecture;International Journal of Microwave and Wireless Technologies;2024-02-23
2. A 58-%-Lock-Range Divide-by-9 Injection-Locked Frequency Divider Using Harmonic-Control Technique;IEICE Transactions on Electronics;2023-10-01
3. Ultrawideband Frequency Synthesis Using the Compact Tunable Transmission Line (CTTL);IEEE Transactions on Microwave Theory and Techniques;2022-07
4. An integrated 0.0625–4 GHz quadrature-output fractional-N frequency synthesizer for software-defined radios;Microelectronics Journal;2022-01
5. A 3.1-51GHz, Sub-8mW, Single-Core LC VCO Based on a Novel Compact Tunable Transmission Line (CTTL) Resonator in 28nm FDSOI CMOS;2021 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2021-06-07
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