Funder
Laboratorio de Simulación Hardware-in-the-loop para Sistemas Ciberfísicos
Spanish Ministry of Economy and Competitiveness
Spanish Ministry of Science, Innovation and Universities, CERVERA research programme of Centro para el Desarrollo Tecnológico Industrial
Industrial and Technological Development Centre of Spain, through the research Project HySGrid+
6th Plan of Research and Transfer of Universidad de Sevilla
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
General Engineering,General Materials Science,General Computer Science
Cited by
22 articles.
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