A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort-Reference-Cited by-同舟云学术

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A Three-Phase Frequency-Fixed DSOGI-PLL With Low Computational Effort

Published:2023 Issue: Volume:11 Page:34932-34941
ISSN:2169-3536
Container-title:IEEE Access
language:
Short-container-title:IEEE Access

Author:

Hoepfner Benjamin¹^ORCID,Vick Ralf¹^ORCID

Affiliation:

1. Chair of Electromagnetic Compatibility (EMV), Otto-von-Guericke University Magdeburg, Magdeburg, Germany

Funder

Federal Ministry for Economic Affairs and Climate Action based on a decision by the German parliament

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

General Engineering,General Materials Science,General Computer Science,Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/6287639/10005208/10093868.pdf?arnumber=10093868

Reference40 articles.

1. Development of Frequency-Fixed All-Pass Filter-Based Single-Phase Phase-Locked Loop

2. Single-Phase Phase-Locked Loop Based on Derivative Elements

3. A Grid Synchronization PLL Method Based on Mixed Second- and Third-Order Generalized Integrator for DC Offset Elimination and Frequency Adaptability

4. Analyses and Enhancement of Linear Kalman-Filter-Based Phase-Locked Loop

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