1. Parallel AIG Refactoring via Conflict Breaking;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. A General Framework for Efficient Logic Synthesis;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
3. Adaptive Reconvergence-driven AIG Rewriting via Strategy Learning;2023 IEEE 41st International Conference on Computer Design (ICCD);2023-11-06
4. Heuristic Logic Resynthesis Algorithms at the Core of Peephole Optimization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11
5. EffiSyn: Efficient Logic Synthesis with Dynamic Scoring and Pruning;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28