Funder
MeitY, VLSI Lab at IIT Bombay, SMDP Phase III, SCL Chandigarh, Government of India through the Chip-to-System Program (C2S) for financial support in providing lab facilities and EDA tools
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Energy Engineering and Power Technology
Cited by
17 articles.
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