Author:
Yasuda Y.,Tokuda Y.,Zaima S.,Pak K.,Nakamura T.,Yoshida A.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
52 articles.
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5. Design of Universal Set of CMOS Gates using Multiple Valued Logic;2022 International Conference on Emerging Trends in Engineering and Medical Sciences (ICETEMS);2022-11-18