Separation measurement of parasitic impedance on a power electronics circuit board using TDR-Reference-Cited by-同舟云学术

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Separation measurement of parasitic impedance on a power electronics circuit board using TDR

Published:2010-09 Issue: Volume: Page:
ISSN:
Container-title:2010 IEEE Energy Conversion Congress and Exposition
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Author:

Hashino Satoshi,Toshihisa Shimizu

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5606065/5617696/05618046.pdf?arnumber=5618046

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. PCB Layout Parasitics Extraction of a GaN Half-Bridge: Simulation and Experimental Validation;2023 25th European Conference on Power Electronics and Applications (EPE'23 ECCE Europe);2023-09-04

2. A Novel Power Loop Parasitic Extraction Approach for Paralleled Discrete SiC MOSFETs on Multilayer PCB;IEEE Journal of Emerging and Selected Topics in Power Electronics;2021-10

3. Parasitic Inductances Extraction for SiC Power Modules Using An Enhanced Two-Port S-Parameter Approach;2021 IEEE Applied Power Electronics Conference and Exposition (APEC);2021-06-14

4. Design of a Laminated Bus Bar Optimizing the Surge Voltage, Damped Oscillation, and Switching Loss;IEEE Transactions on Industry Applications;2021-05

5. A Survey on Switching Oscillations in Power Converters;IEEE Journal of Emerging and Selected Topics in Power Electronics;2020-03

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