Author:
Stepchenkov Yuri A.,Kamenskih Anton N.,Diachenko Yuri G.,Rogdestvenski Yuri V.,Diachenko Denis Y.
Cited by
5 articles.
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1. Failure-Tolerant Synchronous and Self-Timed Circuits Comparison;Russian Microelectronics;2022-12
2. Failure-tolerant synchronous and self-timed circuits comparison;Izvestiya Vysshikh Uchebnykh Zavedenii. Materialy Elektronnoi Tekhniki = Materials of Electronics Engineering;2022-01-25
3. Improvement of the Quasi Delay-Insensitive Pipeline Noise Immunity;2020 IEEE 11th International Conference on Dependable Systems, Services and Technologies (DESSERT);2020-05
4. Scientific research in the interests of digital transformation of society;Futurity designing. Digital reality problems;2020
5. Improvement of the Natural Self-Timed Circuit Tolerance to Short-Term Soft Errors;Advances in Science, Technology and Engineering Systems Journal;2020