Modeling Time and Bias Dependence of Classical HCD Mechanism (Peak ISUB Stress) in n-MOSFETs
Author:
Affiliation:
1. Indian Institute of Technology Bombay,Department of Electrical Engineering,Mumbai,India,400076
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9764406/9764408/09764505.pdf?arnumber=9764505
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2. Compensation of Hot Carrier Degradation Enabled by Forward Back Bias in π-GAA-π MOSFET;IEEE Journal of the Electron Devices Society;2023
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4. A Method to Isolate Intrinsic HCD and NBTI Contributions Under Self Heating During Varying VG/VD Stress in GAA Nanosheet PFETs;IEEE Transactions on Electron Devices;2022-07
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