Reliability, Availability, and Serviceability Challenges for Heterogeneous System Design

Author:

Beigi Majed Valad1,Gurumurthi Sudhanva2,Sridharan Vilas1

Affiliation:

1. RAS Architecture AMD, Inc.,Boxborough,MA

2. RAS Architecture AMD, Inc.,Austin,TX

Publisher

IEEE

Reference27 articles.

1. Impact of Scaling on Neutron-Induced Soft Error in SRAMs From a 250 nm to a 22 nm Design Rule

2. Keynote Talk Title:”From Research to Product: RAS Features in EPYC and Radeon Instinct;sridharan;In 25th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS),2019

3. HBM3 RAS: Enhancing Resilience at Scale

4. Lifetime memory reliability data from the field

5. AMD64 Architecture Programmer's Manual,2021

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2. ZEC ECC: A Zero-Byte Eliminating Compression-Based ECC Scheme for DRAM Reliability;IEEE Access;2024

3. Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

4. Fault Management Impacts on the Networking Systems Hardware Design;IECON 2023- 49th Annual Conference of the IEEE Industrial Electronics Society;2023-10-16

5. A Systematic Study of DDR4 DRAM Faults in the Field;2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2023-02

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