A 3.84 GHz 32 fs RMS Jitter Over-Sampling PLL with High-Gain Cross-Switching Phase Detector
Author:
Affiliation:
1. School of Integrated Circuits, East China Normal University,Shanghai,China
2. University of Houston,Department of Electrical and Computer Engineering,Houston,TX,USA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10181241/10181318/10181713.pdf?arnumber=10181713
Reference19 articles.
1. A Reference-Waveform Oversampling Technique in a Fractional-N ADPLL
2. Reference Oversampling PLL Achieving −256-dB FoM and −78-dBc Reference Spur
3. A 3.36 GHz locking-tuned type-I sampling PLL with -78.6 dBc reference spur merging single-path reference-deedthrough-suppression and narrow-pulse-shielding techniques;huang;IEEE Transactions on Circuits and Systems II,2021
4. A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push–Pull SS-PD and a Fast-Locking FLL Achieving −82.2-dBc REF Spur and −255-dB FOM
5. A 9 GHz 72 fs total-integrated-jitter fractional-N digital PLL with calibrated frequency quadrupler;buccoleri;IEEE Custom Integrated Circuits Conference (CICC),2022
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