Author:
Acero Cesar,Feltham Derek,Patyra Marek,Hapke Friedrich,Moghaddam Elham,Mukherjee Nilanjan,Neerkundar Vidya,Rajski Janusz,Tyszer Jerzy,Zawada Justyna
Funder
Polish Ministry of Science and Higher Education
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
5 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Hybrid Test Point Insertion Strategy for Improved Test Metrics;2024 IEEE 8th International Test Conference India (ITC India);2024-07-21
2. A Review of Cell-Aware Test Patterns to Reduce the DPPM and Test Results from 7 nm;Journal of The Institution of Engineers (India): Series C;2023-04-05
3. Calculation of probabilistic testability measures for digital circuits with Structurally Synthesized BDDs;Microprocessors and Microsystems;2020-09
4. A Survey on Test Point Insertion (TPI) Schemes;2020 International Conference on Inventive Computation Technologies (ICICT);2020-02
5. Embedded Deterministic Test Points;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-10