Ultrafast ID VG Technique for Reliable Cryogenic Device Characterization

Author:

Shrestha Pragya R.1ORCID,Akturk Akin2ORCID,Hoskins Brian3,Madhavan Advait4,Campbell Jason P.1ORCID

Affiliation:

1. Theiss Research, La Jolla, CA, USA

2. CoolCad LLC, College Park, MD, USA

3. National Institute of Standards and Technology, Gaithersburg, MD, USA

4. Institute for Research in Electronics and Applied Physics, University of Maryland at College Park, College Park, MD, USA

Funder

University of Maryland through the Cooperative Research Agreement

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology

Reference26 articles.

1. A comparison of quantum-mechanical capacitance-voltage simulators

2. A cryogenic CMOS chip for generating control signals for multiple qubits

3. Negative U traps in HfO2 gate dielectrics and frequency dependence of dynamic BTI in MOSFETs;shen;IEEE Int Electron Devices Meeting Tech Dig,2004

4. The fast initial threshold voltage shift: NBTI or high-field stress

5. A 110mK 295 mu W 28?m FDSOI CMOS quantum integrated circuit with a 2.8GHz excitation and nA current sensing of an on-chip double quantum dot;le guevel;Proc IEEE Int Solid-State Circuits Conf (ISSCC),2020

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