NULL Convention Logic/sup TM/: a complete and consistent logic for asynchronous digital circuit synthesis-Reference-Cited by-同舟云学术

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NULL Convention Logic/sup TM/: a complete and consistent logic for asynchronous digital circuit synthesis

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Container-title:Proceedings of International Conference on Application Specific Systems, Architectures and Processors: ASAP '96
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Author:

Fant K.M.,Brandt S.A.

Publisher

IEEE Computer Soc. Press

Link

http://xplorestaging.ieee.org/ielx3/3973/11462/00542821.pdf?arnumber=542821

Cited by 152 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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2. A Scalable Formal Framework for the Verification and Vulnerability Analysis of Redundancy-Based Error-Resilient Null Convention Logic Asynchronous Circuits;Journal of Low Power Electronics and Applications;2024-01-14

3. Speed, Power and Area Optimized Monotonic Asynchronous Array Multipliers;Journal of Low Power Electronics and Applications;2023-12-24

4. Error Resilient Sleep Convention Logic Asynchronous Circuit Design;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26

5. Design of Quasi Delay Insensitive Combinational Circuits Based on Optimized DIMS;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27

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