BRAVO: Balanced Reliability-Aware Voltage Optimization

Author:

Swaminathan Karthik,Chandramoorthy Nandhini,Cher Chen-Yong,Bertran Ramon,Buyuktosunoglu Alper,Bose Pradip

Publisher

IEEE

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Understanding Timing Error Characteristics from Overclocked Systolic Multiply–Accumulate Arrays in FPGAs;Journal of Low Power Electronics and Applications;2024-01-09

2. ReLIEF: A Reinforcement-Learning-Based Real-Time Task Assignment Strategy in Emerging Fault-Tolerant Fog Computing;IEEE Internet of Things Journal;2023-06-15

3. Electromigration-Aware Architecture for Modern Microprocessors;Journal of Low Power Electronics and Applications;2023-01-11

4. DarkGates: A Hybrid Power-Gating Architecture to Mitigate the Performance Impact of Dark-Silicon in High Performance Processors;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04

5. Reliability-Aware Runahead;2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2022-04

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