Analysis and Validation of Low-Frequency Noise Reduction in MOSFET Circuits Using Variable Duty Cycle Switched Biasing-Reference-Cited by-同舟云学术

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Analysis and Validation of Low-Frequency Noise Reduction in MOSFET Circuits Using Variable Duty Cycle Switched Biasing

Published:2018 Issue: Volume:6 Page:420-431
ISSN:2168-6734
Container-title:IEEE Journal of the Electron Devices Society
language:
Short-container-title:IEEE J. Electron Devices Soc.

Author:

Jainwal Kapil^ORCID,Sarkar Mukul^ORCID,Shah Kushal^ORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology

Link

http://xplorestaging.ieee.org/ielx7/6245494/8232486/08290662.pdf?arnumber=8290662

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Low-Noise Area-Efficient Column-Parallel ADC With an Input Triplet for a 120-dB High Dynamic Range CMOS Image Sensor;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-12

2. A Novel Active Pixel Sensor Architecture with In-Pixel Chopping and Switched Biasing to Reduce the Low-Frequency Noise;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

3. A 280-μ V Temporal Noise, 76-dB Dynamic Range CMOS Image Sensor With an In-Pixel Chopping-Based Low-Frequency Noise Reduction Technique;IEEE Transactions on Electron Devices;2023-03

4. 1/$f$ Noise Reduction Using In-Pixel Chopping in CMOS Image Sensors;IEEE Solid-State Circuits Letters;2018-06

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