Numerical Analysis of the LDMOS With Side Triangular Field Plate
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials,Biotechnology
Link
http://xplorestaging.ieee.org/ielx7/6245494/8656606/08854244.pdf?arnumber=8854244
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A Bulk Full-Gate SOI-LDMOS Device With Bulk Channel and Electron Accumulation Effect;IEEE Transactions on Electron Devices;2021-12
2. Silicon-on-Insulator Lateral DMOS With Potential Modulation Plates and Multiple Deep-Oxide Trenches;IEEE Transactions on Electron Devices;2021-10
3. Deep neural network-based approach for breakdown voltage and specific on-resistance prediction of SOI LDMOS with field plate;Japanese Journal of Applied Physics;2021-06-16
4. Novel Si/SiC heterojunction lateral double-diffused metal–oxide semiconductor field-effect transistor with p-type buried layer breaking silicon limit*;Chinese Physics B;2021-03-01
5. Lateral Power Fin MOSFET With a High-k Passivation for Ultra-Low On-Resistance;IEEE Access;2020
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