Reduce, Reuse, Recycle (R<sup>3</sup>): A design methodology for Sparse Matrix Vector Multiplication on reconfigurable platforms-Reference-Cited by-同舟云学术

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Reduce, Reuse, Recycle (R³): A design methodology for Sparse Matrix Vector Multiplication on reconfigurable platforms

Published:2013-06 Issue: Volume: Page:
ISSN:
Container-title:2013 IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors
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Author:

Townsend Kevin,Zambreno Joseph

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6558539/6567524/06567573.pdf?arnumber=6567573

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. CASK;Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2016-02-21

2. A Reconfigurable Architecture for the Detection of Strongly Connected Components;ACM Transactions on Reconfigurable Technology and Systems;2016-02-03

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