Real time all intra HEVC HD encoder on FPGA-Reference-Cited by-同舟云学术

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Real time all intra HEVC HD encoder on FPGA

Published:2016-07 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP)
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Author:

Atapattu Sachille,Liyanage Namitha,Menuka Nisal,Perera Ishantha,Pasqual Ajith

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7750935/7760761/07760792.pdf?arnumber=7760792

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Fraction Execution Resolver Using a Hybrid Multi-CPU/GPU Encoding Scheme;Electronics;2023-08-25

2. Comparative Analysis of Power and Hardware Utilization in an Energy-Efficient 8:3 Encoder;2023 4th International Conference on Electronics and Sustainable Communication Systems (ICESC);2023-07-06

3. Hardware Architecture for Realtime HEVC Intra Prediction;Electronics;2023-04-04

4. High-Level Synthesis Implementation of an Embedded Real-Time HEVC Intra Encoder on FPGA for Media Applications;ACM Transactions on Design Automation of Electronic Systems;2022-03-08

5. Accelerating Transform Algorithm Implementation for Efficient Intra Coding of 8K UHD Videos;ACM Transactions on Multimedia Computing, Communications, and Applications;2022-03-04

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