A 14.5-17.9 GHz Harmonically-Coupled Quad-Core P-N Class-B DCO with -117.3 dBc/Hz Phase Noise at 1 MHz Offset in 28-nm CMOS-Reference-Cited by-同舟云学术

A 14.5-17.9 GHz Harmonically-Coupled Quad-Core P-N Class-B DCO with -117.3 dBc/Hz Phase Noise at 1 MHz Offset in 28-nm CMOS

Published:2022-06-19 Issue: Volume: Page:
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Container-title:2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)
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Author:

Apostolina Ioanna¹,Manstretta Danilo¹

Affiliation:

1. Microlab, University of Pavia,Italy

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9862947/9862948/09863180.pdf?arnumber=9863180

Reference13 articles.

1. A Low Phase Noise, Wide Tuning Range20GHz Magnetic-Coupled Hartley-Vco in a 28nm CMOS Technology;reiter;2019 IEEE Radio and Wireless Symposium (RWS),0

2. An Adaptive Pre-Distortion Technique to Mitigate the DTC Nonlinearity in Digital PLLs

3. 17.7 A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/µs Slope and 1.2GHz Chirp Bandwidth

4. A 10.7–14.1 GHz Reconfigurable Octacore DCO with −126 dBc/Hz Phase Noise at 1 MHz offset in 28 nm CMOS

5. A 27-GHz Quad-Core CMOS Oscillator With No Mode Ambiguity

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