Design of EMB-Based Moore FSMs

Author:

Kołopieńczyk Małgorzata1,Titarenko Larysa2,Barkalov Alexander2

Affiliation:

1. Institute of Control & Computation Engineering, University of Zielona Góra, Licealna 9, 65-417 Zielona Góra, Poland

2. Institute of Metrology, Electronics and Computer Science, University of Zielona Góra, Licealna 9, 65-417 Zielona Góra, Poland

Abstract

The complexity of algorithms implemented in digital systems grows. Methods are developed for most effective use of both hardware resources and energy. For engineers the problem of hardware resources optimization in design of control units is still an important issue. The standard way of implementing the control unit as a finite-state machine (FSM) is not satisfactory as it consumes considerable amounts of field-programmable gate arrays (FPGA) resources. This paper is devoted to the design of a Moore FSM in FPGA structure using look-up tables and embedded memory blocks (EMB) elements. The problem background is discussed. The method of the design of Moore FSM logic circuits with EMB based on splitting the set of logical conditions and the encoding of logical conditions is presented. Examples of design and research results are given.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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