Hardware Efficient Hybrid Encoder for Video Surveillance Application

Author:

Patel Minesh1ORCID,Darji Anand1

Affiliation:

1. Electronics Engineering Department, S. V. National Institute of Technology, Surat, Gujarat 395007, India

Abstract

Extensive use of digital multimedia has led to the development of advance video processing techniques for development of multimedia applications. Application such as video surveillance requires 247 recording and streaming. So, the bandwidth and storage costs become significant. With introduction of video streaming over internet, where different kinds of end users request same content with different available bandwidth, it requires scalable video coding (SVC). These challenges can be overcome by developing new techniques to reduce redundancy in subsequent frames and to improve the coding efficiency. In this paper, overlapping weighted linear sum (OWLS) pre-processing method and its hardware architecture are proposed. It is implemented using field progrmmable gate array (FPGA) and the application specific integrated circuit (ASIC) is also developed using TSMC180nm technology standard cell library. Results show improvement in terms of power and area as compared to the existing work. In motion compensated temporal filtering (MCTF), wavelet transform is implemented by temporal filters. Architecture for 5/3 Lifting MCTF is also implemented and compared with baseline H.264 video codec. Simulation results show that the average peak signal to noise ratio (PSNR) improvement is 2.36[Formula: see text]dB. The MCTF design using 5/3 Lifting filter is synthesized for Virtex-5 FPGA and compared with the existing close-loop architecture with better performance.

Publisher

World Scientific Pub Co Pte Lt

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Electrical and Electronic Engineering,Hardware and Architecture

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