A Disturbance Suppression Zeroing Neural Network for Robust Synchronization of Chaotic Systems and Its FPGA Implementation

Abstract

The synchronization of chaotic systems plays an extremely imperative and fundamental role in the fields of science and engineering. Notably, various external noise disturbances have a great impact on the synchronization of chaotic systems because chaotic systems are quite sensitive to the change of their initial values. Consequently, the robustness of chaotic system synchronization must be considered in practical applications. From this viewpoint, the present paper proposes a disturbance suppression zeroing neural network (DSZNN) for robust synchronization of chaotic and hyperchaotic systems, and the DSZNN is implemented on Field Programmable Gate Array (FPGA) for further hardware validation. The distinctive features of the proposed DSZNN controller have the ability to suppress disturbance with faster convergent speed and higher accuracy compared with super-exponential zeroing neural network (SEZNN) and conventional zeroing neural network (CZNN). Moreover, theoretical analysis, comparative numerical simulations and hardware validations for the synchronization of a hyperchaotic system are presented to demonstrate the superior performance of the proposed DSZNN.