Eliminating failure behavior by introducing CdS inter-layer in Cu2O-based memory cell

Abstract

Resistive switching random access memory (RRAM) has attracted great attention due to its outstanding performance for the next generation non-volatile memory. However, the unexpected failure behaviors seriously hinder the further studies and applications of this new memory device. In this work, the bipolar resistive switching characteristics in Pt/CdS/Cu2O/FTO cells are investigated. The CdS inter-layer is used to suppress the failure behavior in set process. Comparing to the Pt/Cu2O/FTO cell, the switching process in Pt/CdS/Cu2O/FTO cell is not affected even at a high set voltage and the failure behavior is eliminated effectively. Therefore, this work proposes a feasible approach to solve the failure problem in RRAM.