Bandwidth enhancement technique for TIA using flipped voltage follower-Reference-Cited by-同舟云学术

Bandwidth enhancement technique for TIA using flipped voltage follower

Published:2017 Issue:10 Volume:14 Page:20170310-20170310
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Mizuno Shunta¹,Naito Fumiya¹,Nakamura Makoto¹

Affiliation:

1. Graduate School of Eng., Gifu University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/14/10/14_14.20170310/_pdf

Reference10 articles.

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2. [2] C. Kromeret al.: “A low-power 20-GHz 52-dBΩ transimpedance amplifier in 80-nm CMOS,” IEEE J. Solid-State Circuits 39 (2004) 885 (DOI: 10.1109/JSSC.2004.827807).

3. [3] K. Schrödingeret al.: “A fully integrated CMOS receiver front-end for optic Gigabit Ethernet,” IEEE J. Solid-State Circuits 37 (2002) 874 (DOI: 10.1109/JSSC.2002.1015685).

4. [4] B. Huanget al.: “1-Gb/s zero-pole cancellation CMOS transimpedance amplifier for Gigabit Ethernet applications,” J. Semicond. 30 (2009) 105005 (DOI: 10.1088/1674-4926/30/10/105005).

5. [5] D. Y. Junget al.: “Trans-impedance amplifier of source follower topology using an active device for bandwidth extension in optical communication systems,” J. Korean Phys. Soc. 45 (2004) 761.

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