A 200kHz-bandwidth 101dB SNDR noise-shaping SAR ADC with NTF strengthening method
Author:
Affiliation:
1. School of Electronics and information Engineering, Shanghai University of Electric Power
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Link
https://www.jstage.jst.go.jp/article/elex/21/13/21_21.20240239/_pdf
Reference31 articles.
1. [1] C.-C. Liu, et al.: “A 10bit 320MS/s low-cost SAR ADC for IEEE 802.11ac applications in 20nm CMOS,” IEEE J. Solid-State Circuits 50 (2015) 2645 (DOI: 10.1109/JSSC.2015.2466475).
2. [2] C.-C. Liu and M.-C. Huang: “28.1 A 0.46mW 5MHz-BW 79.7dB-SNDR noise-shaping SAR ADC with dynamic-amplifier-based FIR-IIR filter,” 2017 IEEE International Solid-State Circuits Conference (ISSCC) (2017) 466 (DOI: 10.1109/ISSCC.2017.7870463).
3. [3] J.A. Fredenburg and M.P. Flynn: “A 90-MS/s 11-MHz-bandwidth 62-dB SNDR noise-shaping SAR ADC,” IEEE J. Solid-State Circuits 47 (2012) 2898 (DOI: 10.1109/JSSC.2012.2217874).
4. [4] Y.-S. Shu, et al.: “An oversampling SAR ADC with DAC mismatch error shaping achieving 105dB SFDR and 101dB SNDR over 1kHz BW in 55nm CMOS,” IEEE J. Solid-State Circuits 51 (2016) 2928 (DOI: 10.1109/JSSC.2016.2592623).
5. [5] K. Hasebe, et al.: “A 100kHz-bandwidth 98.3dB-SNDR noise-shaping SAR ADC with improved mismatch error shaping and speed-up techniques,” 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) (2022) 56 (DOI: 10.1109/VLSITechnologyandCir46769.2022.9830166).
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