High-speed design for mixed radix FFT algorithm based on multi-bank memory strategy

Author:

Ma Cuimei1,Wang Yanfei1

Affiliation:

1. Institute of Electronics, Chinese Academy of Sciences

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Reference14 articles.

1. [1] R. C. Agarwal and J. W. Cooley: “Vectorized mixed radix discrete Fourier transform algorithms,” Proc. IEEE 75 (1987) 1283 (DOI: 10.1109/PROC.1987.13880).

2. [2] X. J. Liet al.: “A low power and small area FFT processor for OFDM demodulator,” IEEE Trans. Consum. Electron. 53 (2007) 274 (DOI: 10.1109/TCE.2007.381685).

3. [3] Z. B. Zhang and X. W. Li: “Design and implementation of transform precoding in LTE system,” Application of Integrated Circuits 36 (2010) 54.

4. [4] D. F. Liuet al.: “Design and implementation of configurable FFT/IFFT in WIMAX system,” J. Xidian Univ. 37 (2010) 813.

5. [5] S. S. Denget al.: “Design of high-speed FFT processor for length N = q × 2m,” J. Comput. Res. Dev. 45 (2008) 1430.

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