Circuit Description and Design Flow of Superconducting SFQ Logic Circuits
Author:
Affiliation:
1. Graduate School of Informatics, Kyoto University
2. ALCA-JST
3. School of Engineering, Chukyo University
Publisher
Institute of Electronics, Information and Communications Engineers (IEICE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
https://www.jstage.jst.go.jp/article/transele/E97.C/3/E97.C_149/_pdf
Reference18 articles.
1. [1] K.K. Likharev and V.K. Semenov, “RSFQ logic/memory family: A new Josephson-junction technology for sub-terahertz-clock-frequency digital systems,” IEEE Trans. Appl. Supercond., vol.1, no.1, pp.3-28, 1991.
2. [2] T. Satoh, K. Hinode, S. Nagasawa, Y. Kitagawa, M. Hidaka, N. Yoshikawa, H. Akaike, A. Fujimaki, K. Takagi, and N. Takagi, “Planarization process for fabricating multi-layer Nb integrated circuits incorporating top active layer,” IEEE Trans. Appl. Supercond., vol.19, no.3, pp.167-170, 2009.
3. [3] Y. Yamanashi, M. Tanaka, A. Akimoto, H. Park, Y. Kamiya, N. Irie, N. Yoshikawa, A. Fujimaki, H. Terai, and Y. Hashimoto, “Design and implementation of a pipelined bit-serial SFQ microprocessor, CORE1β,” IEEE Trans. Appl. Supercond., vol.17, no.2, pp.474-477, 2007.
4. [4] H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, M. Tanaka, K. Obata, Y. Ito, A. Fujimaki, N. Takagi, K. Takagi, and S. Nagasawa, “Design and implementation and on-chip high-speed test of SFQ half-precision floating-point adders,” IEEE Trans. Appl. Supercond., vol.19, no.3, pp.634-639, 2009.
5. [5] H. Hara, K. Obata, H. Park, Y. Yamanashi, K. Taketomi, N. Yoshikawa, M. Tanaka, A. Fujimaki, N. Takagi, K. Takagi, and S. Nagasawa, “Design, implementation and on-chip high-speed test of SFQ half-precision floating-point multiplier,” IEEE Trans. Appl. Supercond., vol.19, no.3, pp.657-660, 2009.
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Logic-Depth-Aware Technology Mapping Method for RSFQ Logic Circuits With Special RSFQ Gates;IEEE Transactions on Applied Superconductivity;2022-06
2. Concurrent fault detection and location with minimal overhead in Ling parallel prefix adders with a scheme for fault tolerant Ling prefix adders;Microelectronics Reliability;2021-12
3. 64-GHz Datapath Demonstration for Bit-Parallel SFQ Microprocessors Based on a Gate-Level-Pipeline Structure;IEEE Transactions on Applied Superconductivity;2021-08
4. A two-step routing method with wire length budgeting for PTL routing of SFQ logic circuits;Journal of Physics: Conference Series;2020-07-01
5. Logic simulation tool for RSFQ circuits accepting arrivals of multiple pulses in a clock period;Journal of Physics: Conference Series;2020-07-01
1.学者识别学者识别
2.学术分析学术分析
3.人才评估人才评估
"同舟云学术"是以全球学者为主线，采集、加工和组织学术论文而形成的新型学术文献查询和分析系统，可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容，当前同舟云学术共收录了国内外主流学术期刊6万余种，收集的期刊论文及会议论文总量共计约1.5亿篇，并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询！咨询电话：010-8811{复制后删除}0370
www.globalauthorid.com
TOP
Copyright © 2019-2024 北京同舟云网络信息技术有限公司 京公网安备11010802033243号 京ICP备18003416号-3