An optimized fully-passive noise-shaping SAR ADC with integration capacitor reuse technique-Reference-Cited by-同舟云学术

An optimized fully-passive noise-shaping SAR ADC with integration capacitor reuse technique

Published:2020-08-25 Issue:16 Volume:17 Page:20200193-20200193
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Yang Yi¹,Li Di¹,Jiang Chanrong¹,Liu Yuqian¹,Yang Yintang¹

Affiliation:

1. Wide Bandgap Semiconductor Technology Disciplines State Key Laboratory, Xidian University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/17/16/17_17.20200193/_pdf

Reference30 articles.

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2. [2] P. Harpe, et al.: “A 10b/12b 40 kS/s SAR ADC with data-driven noise reduction achieving up to 10.1b ENOB at 2.2 fJ/conversion-step,” IEEE J. Solid-State Circuits 48 (2013) 3011 (DOI: 10.1109/JSSC.2013.2278471).

3. [3] W.-B. Liu, et al.: “A 12-bit, 45-MS/s, 3-mW redundant successive-approximation-register analog-to-digital converter with digital calibration,” IEEE J. Solid-State Circuits 46 (2011) 2661 (DOI: 10.1109/JSSC.2011.2163556).

4. [4] S.-B. Liu, et al.: “A 12-bit 10 MS/s SAR ADC with high linearity and energy-efficient switching,” IEEE Trans. Circuits Syst. I, Reg. Papers 63 (2016) 1616 (DOI: 10.1109/TCSI.2016.2581177).

5. [5] T. Numata, et al.: “A 16-bit 8-MS/s SAR ADC with a foreground calibration and hybrid-charge-supply power structure,” IEICE Electron. Express 10 (2013) 20200097 (DOI: 10.1587/elex.17.20200097).

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