A 36 Gb/s wireline receiver with adaptive CTLE and 1-tap speculative DFE in 0.13 µm BiCMOS technology-Reference-Cited by-同舟云学术

A 36 Gb/s wireline receiver with adaptive CTLE and 1-tap speculative DFE in 0.13 µm BiCMOS technology

Published:2020 Issue:5 Volume:17 Page:20200009-20200009
ISSN:1349-2543
Container-title:IEICE Electronics Express
language:en
Short-container-title:IEICE Electron. Express

Author:

Zhang Yinhang¹,Yang Xi¹

Affiliation:

1. College of Physics and Mechanical Engineering, Jishou University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

https://www.jstage.jst.go.jp/article/elex/17/5/17_17.20200009/_pdf

Reference34 articles.

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2. [2] B. Zhang, et al.: “A 28 Gb/s multi-standard serial-link transceiver for backplane applications in 28 nm CMOS,” ISSCC Dig. Tech. Papers (2015) 3089 (DOI: 10.1109/ISSCC.2015.7062921).

3. [3] S. Agarwal and V. S. R. Pasupureddi: “A 5-Gb/s adaptive CTLE with eye-monitoring for multi-drop bus applications,” IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS) (2014) (DOI: 10.1109/MWSCAS.2014.6908439).

4. [4] C. H. Lee, et al.: “Comparison of receiver equalization using first-order and second-order continuous-time linear equalizer in 45 nm process technology,” International Conference on Intelligent and Advanced Systems (ICIAS2012) (DOI: 10.1109/ICIAS.2012.6306122).

5. [5] G. Chen, et al.: “A high efficient CTLE for 12.5 Gbps receiver of JESD204B standard,” IEICE Electron. Express 15 (2018) 20180617 (DOI: 10.1587/elex.15.20180617).

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