Passage of Faulty Nodes: A Novel Approach for Fault-Tolerant Routing on NoCs

Author:

KUROKAWA Yota1,FUKUSHI Masaru1

Affiliation:

1. Graduate School of Sciences and Technology for Innovation, Yamaguchi University

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Performance Evaluation of Parallel Tasks for Fault-tolerant Routing Methods;2023 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan);2023-07-17

2. A Simple and Effective Evaluation Method for Fault-Tolerant Routing Methods in Network-on-Chips;Journal of Advances in Information Technology;2023

3. Performance Evaluation of Fault-Tolerant Routing Methods Using Parallel Programs;2022 IEEE International Conference on Consumer Electronics - Taiwan;2022-07-06

4. A Fault-tolerant Routing Method for 2D-torus Network-on-Chips Based on Bus Functions;2021 20th International Symposium on Communications and Information Technologies (ISCIT);2021-10-19

5. A Fault-tolerant Routing Method for Network-on-Chips Based on Communication Function Fault Model;2021 9th International Conference on Information and Education Technology (ICIET);2021-03-27

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