Efficient Multiplexer Networks for Field-Data Extractors and Their Evaluations-Reference-Cited by-同舟云学术

Efficient Multiplexer Networks for Field-Data Extractors and Their Evaluations

Published:2017 Issue:4 Volume:E100.A Page:1015-1028
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Trans. Fundamentals

Author:

ITO Koki¹,KAWAMURA Kazushi¹,TAMIYA Yutaka²,YANAGISAWA Masao¹,TOGAWA Nozomu¹

Affiliation:

1. Dept. of Computer Science and Communications Engineering, Waseda University

2. Fujitsu Laboratories Ltd.

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Link

https://www.jstage.jst.go.jp/article/transfun/E100.A/4/E100.A_1015/_pdf

Reference18 articles.

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2. [2] Design Compiler, http://www.synopsys.com/Tools/Implementation/RTLSynthesis/DesignCompiler/Pages/default.aspx

3. [3] H. Jang, S.H. Chung, D.K. Kim, and Y.S. Lee, “An efficient architecture for a TCP offload engine based on hardware/software co-design,” J. Information Science and Engineering, vol.27, no.2, pp.493-509, 2011.

4. [4] K. Ito, Y. Tamiya, M. Yanagisawa, and N. Togawa, “Partitioning-based multiplexer network synthesis for field-data extractors,” Proc. IEEE International System-on-Chip Conference, pp.263-268, 2015.

5. [5] K. Ito, K. Kawamura, Y. Tamiya, M. Yanagisawa, and N. Togawa, “Rotator-based multiplexer network synthesis for field-data extractors,” Proc. IEEE International System-on-Chip Conference, pp.194-199, 2016.