A Three-Dimensional Simulation Study of Source/Drain-Tied Double-Gate Fin Field-Effect Transistor Design for 16-nm Half-Pitch Technology Generation and Beyond-Reference-Cited by-同舟云学术

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A Three-Dimensional Simulation Study of Source/Drain-Tied Double-Gate Fin Field-Effect Transistor Design for 16-nm Half-Pitch Technology Generation and Beyond

Published:2011-08-22 Issue:8 Volume:50 Page:084301
ISSN:0021-4922
Container-title:Japanese Journal of Applied Physics
language:en
Short-container-title:Jpn. J. Appl. Phys.

Author:

Eng Yi-Chuen,Lin Jyi-Tsong,Chang Tzu-Feng,Chen Chun-Yu,Fan Yi-Hsuan,Chen Cheng-Hsin,Lin Po-Hsieh

Publisher

IOP Publishing

Subject

General Physics and Astronomy,Physics and Astronomy (miscellaneous),General Engineering

Reference8 articles.

1. FinFET-a self-aligned double-gate MOSFET scalable to 20 nm

2. Sub-50 nm P-channel FinFET

3. Parasitic S/D resistance effects on hot-carrier reliability in body-tied FinFETs

4. High-Performance BOI FinFETs Based on Bulk-Silicon Substrate

5. A Partially Insulated Field-Effect Transistor (PiFET) as a Candidate for Scaled Transistors

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Significance of Overdrive Voltage in the Analysis or Short-Channel Behaviors of n-FinFET Devices;IEEE J ELECTRON DEVI;2022

2. Significance of Overdrive Voltage in the Analysis of Short-Channel Behaviors of n-FinFET Devices;IEEE Journal of the Electron Devices Society;2022

3. Thermal analysis of self-heating in saddle MOSFET devices;Japanese Journal of Applied Physics;2014-01-15

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